When doing GPU programming, memory coalescing means to coalesce access to global memory. It is an important performance consideration, as loads and stores by threads of a warp can be combined.
Coalescing occurs during accesses of global memory. For efficient accessing to shared memory, see bank conflicts.
When the same instruction for all threads in a warp accesses consecutive global memory locations, the hardware can coalesce all memory accesses into a consolidated access.
Important
A similar idea exists on CPUs, but there is an important difference. CPUs are optimized for a single thread accessing consecutive memory locations to make good use of caches. In contrast, GPUs are optimized for threads in a warp accessing consecutive memory locations. From the perspective of an individual GPU thread, strided access can therefore be acceptable or even preferable if it results in coalesced accesses at the warp level.